1. Field of the Invention
The present invention relates to a solid electrolytic capacitor including a first cathode layer provided on a dielectric layer and a second cathode layer provided on the first cathode layer, and to a method of manufacturing the solid electrolytic capacitor.
2. Description of the Related Art
In recent years, as the performance of a CPU used in a PC or the like increases, a solid electrolytic capacitor having low equivalent series resistance (abbreviated as ESR) in a high frequency band has been required. The value of ESR depends on the conductivity of the cathode. In addition, in a case where the cathode includes a multilayer structure, the value of ESR depends on the contact resistance between the cathode layers.
As a solid electrolytic capacitor achieving a reduction in the value of ESR, a solid electrolytic capacitor including a first cathode layer provided on a dielectric layer and a second cathode layer provided on the first cathode layer is suggested (Japanese Patent Publication No. Heisei 4-48710, for example). The first cathode layer is a polypyrrole layer by chemical polymerization using a dopant containing aromatic sulfonic acid anion. The second cathode layer is a polypyrrole layer by electrolytic polymerization.
In addition, a solid electrolytic capacitor including a first cathode layer made of polythiophene or the like and a second cathode layer made of polypyrrole or the like is suggested (Japanese Patent Publication No. Heisei 10-821471, for example). Specifically, the first cathode layer is formed by heating or chemically polymerizing thiophene monomer.